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uCOSII

 

What isµC/OS-II

μC/OS-II is a portable, ROMable, scalable, preemptive, real-time deterministic multitasking kernel for microprocessors, microcontrollers and DSPs

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What does it do?

Offering unprecedented ease-of-use, μC/OS-II is delivered with complete 100% ANSI C source code and in-depth documentation. μC/OS-II runs on the largest number of processor architectures, with ports available for download from the Micrium Web site.

μC/OS-II manages up to 250 application tasks. μC/OS-II includes: semaphores; event flags; mutual-exclusion semaphores that eliminate unbounded priority inversions; message mailboxes and queues; task, time and timer management; and fixed sized memory block management.

 

μC/OS-II’s footprint can be scaled (between 5 Kbytes to 24 Kbytes) to only contain the features required for a specific application. The execution time for most services provided by μC/OS-II is both constant and deterministic; execution times do not depend on the number of tasks running in the application.

 

A validation suite provides all documentation necessary to support the use of μC/OS-II in safety-critical systems. Specifically, μC/OS-II is currently implemented in a wide array of high level of safety-critical devices, including:

 

Those certified for Avionics DO-178B
Medical FDA pre-market notification (510(k)) and pre-market approval (PMA) devices
SIL3/SIL4 IEC for transportation and nuclear systems, 99% compliant with the Motor Industry Software Reliability Association (MISRA-C:1998) C Coding Standards

 

Features

 

The features of µC/OS-II include:

Preemptive multitasking real-time kernel with optional round robin scheduling
Delivered with complete, clean, consistent, 100% ANSI C source code with in-depth documentation.
Mutual exclusion semaphores with built-in priority ceiling protocol to prevent priority inversions
Timeouts on ‘pend’ calls to prevent deadlocks
Up to 254 application tasks (1 task per priority level), and unlimited number of kernel objects
Highly scalable (6K to 24K bytes code space, 1K+ bytes data space)
Very Low Interrupt Disable Time
Third party certifiable

 

Multi-threaded applications

µC/OS-II allows developers to produce multi-threaded applications, vital to the development of safety-critical systems. Thanks to improved integration with IAR Embedded Workbench for ARM, developers can access all the inherent non-reentrant features of C/C++ in a thread-safe manner.

Application developers who write code for use in multi-threaded environments will find the support critical when protecting shared objects using system locks, file-stream locks, and thread-local storage (TLS) in multi-threaded environments.

Micrium and IAR collaborated in providing the first thread-safe support in µC/OS-II for the IAR DLIB run-time library. Protection for such non-reentrant functions as strtok(), rand(), errno() and more are local to each thread. Global and static variables typically used by these functions are protected by the Micrium kernel.

 

Who should use this RTOS?

Developers who want to save time on their current and next embedded system project, and who want the cleanest, most popular, and robust RTOS on the market.

Supported Processors

See the complete list of available ports in the Download Center.

Maximum ROM Footprint (Unscaled)

24 Kbytes

Minimum ROM Footprint (Scaled)

6 Kbytes

Number of Kernel Services

10 different using 80 API calls

Multitasking Model

Preemptive

Code Execution Entities

Tasks, ISRs

Dynamic Objects

Static and Dynamic

Data Movement

Message Mailboxes (unlimited)
Message Queues (unlimited)

Semaphores – Full Counting

Yes (unlimited)

Mutexes – With Priority Inheritance

Yes (priority calling)

Event Flags

Yes (unlimited), configurable for 8, 16, or 32 bits

Memory Partitions – RAM Management

Yes

Timers

Yes (unlimited)

 

Supported processors

 

FPU (Floating-Point Unit) Support

Yes

MPU (Memory Protection Unit) Support

Yes (μC/OS-MPU)

MMU (Memory Management Unit) Support

Yes (μC/TimeSpaceOS)

 

Multi-core support

 

µC/OS-II supports Asymmetrical Multi-Processing (AMP) on multi-core MCUs

 

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Multitasking model

µC/OS-II supports preemptive multitasking.

Maximum number of Tasks

254 application tasks

Clear stack at task creation

Yes (optional per-task)

Run-time stack checking

Yes (optional)

Catch/delete task that return

Yes

Reentrant libraries

Yes (support of Thread Local Storage for compiler)

Task registers

Yes (unlimited)

Tick rate

Configurable (Typ. 1 to 100 ms)

 

ISR stack

Micrium provides an optional ISR stack for µC/OS-II.

User definable hooks

Yes

Task switch hook

Yes

Idle task hook

Yes

Statistic task hook

Yes

Create task hook

Yes

Delete task hook

Yes

Catch task return hook

Yes

Initialization hook

Yes

Footprint

Memory footprint for µC/OS-II:

ROMable

Yes

Scalable

Yes (compile and run-time configurable)

ROM (Min-Max)

6K-20K (bytes)

RAM

500+ (bytes)

 

ANSI-C source

µC/OS-II is provided as clean and highly consistent ANSI-C source code.

Number of source files

Fewer than 25

Argument checking

Yes (optional)

ASCII names for kernel objects

Yes

MISRA-C:2004 rules

Yes (most)

 

Kernel services

µC/OS-II provides approximately 80 API calls.

Timeout on calls

Yes (prevents deadlocks)

Semaphores

Yes (unlimited)

Event Flags

Yes (unlimited)

Mutual Exclusion Semaphores

Yes (priority ceiling protocol)

Message queues

Yes (unlimited)

Memory partitions

Yes (prevents fragmentation)

Software timers

Yes (unlimited)

Task suspend/resume

Yes

Lock/Unlock scheduler

Yes

Pend on multiple objects

Yes (optional)

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Built-in performance measurements

Micrium provides optional built-in performance measurements.

Maximum interrupt disable time

Yes

Maximum scheduler lock time

Yes

Total CPU usage (%)

Yes

Per-Task stack usage

Yes

Per-Task run counter

Yes

Message pool statistics

Yes

Context switch counter

Yes

Debugger Kernel Awareness Support

Yes

Third-party certifications

µC/OS-II is certified for:

Avionics, DO178B

Yes (Level A)

Medical, FDA 510(k)

Yes

Industrial, IEC61508

Yes

 

Debugger kernel awareness support

µC/OS-II includes support for Kernel Awareness.

IAR

Yes

Atollic

Yes

Others

Call us

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Supported CPU Architectures

The following table lists CPU architectures for which µC/OS-II ports are readily available. A new port can easily be written or adapted to your specific needs either by yourself or Micrium.

You can find example projects that demonstrate some of our currently-available µC/OS-II kernel ports in the Download Center.

You can also contact our sales department for more information about supported platforms or port development.

Manufacturer

CPU

Altera

Nios II

Analog Devices

Blackfin

ARM

ARM7
ARM9
ARM11
Cortex-A8
Cortex-A9
Cortex-R4
Cortex-M0
Cortex-M1
Cortex-M3
Cortex-M4(F)

ATMEL

AVR
AVR32

Freescale

68HC12
ColdFire
DSP58K
HCS12
HCS12X
M683XX
MC9S08

Fujitsu

FR

IBM

PowerPC 405
PowerPC 440

Intel

80×86

Lattice Semiconductor

LatticeMico32

Microchip

PIC24
PIC32

Microsoft

Win32

NXP

XA

Renesas

78K0(R)
H8-300L
H8S
H8SX
M16C
M32C
R32C
RL78
RX200
RX600
SuperH 2A
V850E/2/S

Texas Instruments

MSP430

Xilinx

MicroBlaze

 

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